It is possible to form electronic circuits using printing technologies, typically ink-jet printing, where the ‘ink’ is actually liquids that can form the structures. Printed lines and dots used in forming the circuit have relatively large features sizes that are not conducive to some electronic devices.
In one example, assume an active matrix display backplane with high fill-factor pixels. Fill factor is generally a ration of the area of pixel that is actively controlling, or in the case of active-matrix sensor arrays receiving/sensing light, to the area of the entire pixel. Each pixel of a thin-film transistor (TFT) active matrix backplane generally has a switching transistor and a pixel pad for each pixel.
Each transistor typically consists of several layers: a gate layer, a gate dielectric layer, a source/drain layer and a semiconducting layer. In typical pixels with bottom-gate TFTs, the data lines which apply the data signals to the pixels are on the same level as the source/drain layer of the TFT and of the pixel pad. If the data lines are wide, the region of the pixel pad becomes smaller within a given area for a pixel. The area of the pixel is limited because image quality generally comes from a number of pixels per image, and as many pixels as possible are squeezed onto a given backplane.
In an approach to overcome this problem an additional metal layer is introduced which extends or ‘mushrooms’ the pixel drain pad layer over the transistor circuitry and partially over the data lines. This also shields the TFT channel region from light which is essential for low charge-leakage in the TFT off-state. Vias are formed in a dielectric layer over the transistor to allow connection between this ‘mushroom metal’ pixel pad and the underlying drain pad which is connected to the drain of the TFT. The example of a display backplane is compelling, but forming of vias for interconnects between layers is also important in other electronic circuits where often multiple dielectric layers separate conducting, semiconducting or otherwise functional layers, referred to here as active electronic layers or active layers. Moreover, forming simple via holes in a dielectric layer is required for other applications such as in microfluidic circuits where the dielectric layer may contain a fluid and sensing elements lie in a layer underneath the dielectric.
However, forming vias in a printing technology can be a problem. Printing technologies tend to be additive, where things are added together to form images, such as in color printing where colors are added together to form a final color. Circuits formed from printing technologies are generally formed by adding layers to other layers to form the structures. In one example, a conventional semiconductor fabrication process deposits a continuous dielectric layer. To form vias, the process must etch the vias into the dielectric. In another example, a micromolding process molds a polymeric dielectric layer with vias in a single step, if alignment is included in the step. However, a thin surface layer typically remains at the bottoms of the vias that has to be removed by etching.
Generally, etching, such as wet-chemical or plasma etching, does not occur in printing technologies. This makes forming the vias problematic, as vias are normally formed by etching.